project engineering interns
- Internship, onsite
- Schneider Electric
- Cikarang Barat, Indonesia
Salary undisclosed
Checking job availability...
Original
Simplified
- Design LV electrical
- Create drawing GA SLD schematic, making BOM and SR
- Familiar with AutoCad or Creo software is a must
- A must active student university status with max semester 8
- Willing to be place in Cikarang Plant for 6 months length
Req: 00926O
- Design LV electrical
- Create drawing GA SLD schematic, making BOM and SR
- Familiar with AutoCad or Creo software is a must
- A must active student university status with max semester 8
- Willing to be place in Cikarang Plant for 6 months length
Req: 00926O